A flip chip is generally a monolithic surface mount (SM) semiconductor device, such as an integrated circuit, having bead-like terminals formed on one of its surfaces. As illustrated in FIG. 1, the terminals are typically in the form of solder bumps 12 near an edge 14 of the flip chip 10. The solder bumps 12 serve to both secure the chip 10 to a circuit board (not shown) and electrically interconnect the flip chip circuitry to a conductor pattern (not shown) formed on the circuit board, which may be a ceramic substrate, printed wiring board, flexible circuit, or a silicon substrate. Due to the numerous functions typically performed by the microcircuitry of a flip chip, a relatively large number of solder bumps are required. As also shown in FIG. 1, the solder bumps 12 are formed on circular-shaped, electrically-conductive input/output pads 16 that are electrically interconnected with the circuitry on the flip chip 10 through vias 18. The size of a typical flip chip is generally on the order of a few millimeters per side, resulting in the solder bumps 12 being crowded along the edge 14 of the flip chip 10. As a result, flip chip conductor patterns are typically composed of numerous individual conductors that are typically spaced apart about 0.5 millimeter or less.
Because of the narrow spacing required for the solder bumps and conductors, soldering a flip chip to its conductor pattern requires a significant degree of precision. Reflow solder techniques are widely employed for this purpose, and entail precisely depositing a controlled quantity of solder on the circular-shaped input/output pads of the flip chip using methods such as electrodeposition. Once deposited, heating the solder above its liquidus temperature serves to form the characteristic spherically-shaped solder bumps on the pads. After cooling to solidify the solder bumps, the chip is soldered to the conductor pattern by registering the solder bumps with their respective conductors and then reheating, or reflowing, the solder so as to metallurgically adhere, and thereby electrically interconnect, each solder bump with its corresponding conductor, forming what will be referred to herein as a solder bump connection.
Placement of the chip and reflow of the solder must be precisely controlled not only to coincide with the spacing of the terminals and the size of the conductors, but also to control the height of the solder bump connections after soldering. As is well known in the art, controlling the height of solder bump connections after reflow is often necessary to prevent the surface tension of the molten solder bumps from drawing the flip chip excessively close to the substrate during the reflow operation. Sufficient spacing between the chip and its substrate, which may be termed the "stand-off height," is desirable for enabling stress relief during thermal cycles, allowing penetration of cleaning solutions for removing undesirable processing residues, and enabling the penetration of mechanical bonding and encapsulation materials between the chip and its substrate.
Solder bump position and height are generally controlled by the amount of solder deposited on the circular-shaped pads to form the solder bump and/or by limiting the surface area over which the solder bump is allowed to reflow on its conductor. Within certain limits, smaller input/output pads promote a greater height for solder bump connections after reflow for a given quantity of solder, though an excessively small pad tends to produce a solder bump characterized by a poor connection due to inadequate adhesion. On the other hand, limiting the reflow surface area of a conductor typically involves the use of solder stops formed on each conductor to which a flip chip is to be registered. Because each solder bump is registered and soldered directly to a conductor, the conductors must be formed of a solderable material, which as used herein means that a tin or lead-base solder with suitable alloying additives is able to adhere to the conductor through the formation of a metallurgical bond. In contrast, the solder stops are intentionally formed of a nonsolderable material, i.e., a tin or lead-base solder will not adhere to the material for failure to form a metallurgical bond. Consequently, the solder stops determine the surface area of a solderable conductor over which the solder bump is able to flow during reflow, which in turn assist in determining the height of the resulting solder bump connection and therefore the stand-off height of the flip chip relative to the substrate.
While flip chip conductors equipped with solder stops are widely used in the art, trends in the industry have complicated the ability for solder bumps with solder stops to yield solder connections that provide adequate stand-off heights for flip chips. Specifically, as flip chips have become more complex, the number of bumps that must be accommodated along the chip perimeter has increased. In turn, the conductors to which the bumps are registered and soldered have become more closely spaced and narrower, e.g., line widths of about 0.4 millimeter or less. Such circumstances have complicated the design and fabrication of solder stops. As a result, solder bump connections having adequate stand-off height are more difficult to consistently produce, which increases the difficulty of adequately dispersing encapsulation materials between flip chips and their substrates. Inadequate stand-off height also renders the solder connections more susceptible to fatigue fracture and increases the difficulty with which solder flux residue is removed following the solder process. Finally, if inadequate stand-off height occurs with fine pitch conductors, interaction and solder bridging between adjacent solder bump connections is also more likely to occur due to excessive lateral flow of the solder during reflow.
Accordingly, it would be desirable if an improved method were available for controlling the stand-off height of a surface mount device following reflow in which a solder bump connection is formed to electrically and mechanically attach the device to a conductor pattern. It would also be desirable if such a method was particularly applicable to surface mount devices having fine pitch terminal patterns.